The difference is substantial at system scale. Nvidia now lists 3.0 terabytes per second of NVLink bandwidth for each Rubin GPU in the Vera Rubin NVL72 platform, down from the previously reported 3.6 TB/s. That is an approximately 17% reduction in the bandwidth available to each GPU package.
The SemiAnalysis post identified the change and said the lower figure reflects signal integrity limits affecting Vera Rubin’s bidirectional SerDes links. Its explanation referred to crosstalk, insertion loss and return loss, all of which can reduce the usable rate below the theoretical signaling capability.
The updated number is also present in Nvidia’s current Vera Rubin NVL72 specifications. The product page lists 3 TB/s per Rubin GPU, 6 TB/s per Vera Rubin Superchip and 216 TB/s for the full NVL72 rack. It also lists 19.2 TB/s of HBM4 bandwidth per GPU.
Those figures replace a higher set of numbers published earlier by Nvidia. In an earlier Nvidia technical blog, the company said sixth generation NVLink delivered 3.6 TB/s per GPU and 260 TB/s per NVL72 rack. The gap between the two rack figures is also meaningful. Nvidia’s current 216 TB/s listing is about 17% below the earlier 260 TB/s figure.
The company’s current specifications page does not explain why the figures changed. That leaves several possibilities open. Nvidia may have revised the design, corrected an earlier estimate or changed the way it calculates bandwidth. The SemiAnalysis commentary connects the reduction to physical limitations, but it does not establish which of those explanations applies.
The distinction between signaling speed and usable bandwidth is important for modern AI systems. SerDes, short for serializer and deserializer, converts data into high speed electrical or optical signals so chips can communicate over physical links. A theoretical rate describes what the link could carry under ideal conditions. A deployed system must also account for interference between adjacent connections, signal loss through materials and connectors, and the need to preserve reliable data transmission.
That is particularly relevant to NVLink because Nvidia’s multi GPU systems depend on fast communication between accelerators. Training workloads frequently exchange gradients, parameters and intermediate activations. Inference systems serving large models can also need to move data between GPUs when a model is split across devices.
A lower interconnect rate does not automatically mean a 17% reduction in application performance. The impact will depend on the workload, the amount of communication it requires and how effectively software can overlap data transfers with computation. Models that spend most of their time performing local calculations may see little change. Workloads that synchronize frequently or move large tensors between GPUs could face greater overhead.
The business implications are more direct. Cloud providers and other buyers may need additional GPUs, different model parallelism strategies or more capacity elsewhere in the network to meet a target level of performance. More hardware can raise capital and operating costs, while software changes may require engineering work and could limit which models run efficiently.
The revised figures also complicate comparisons with rival accelerator platforms. Buyers often use advertised bandwidth as an early indicator of how well a system will scale, but theoretical link rates do not provide a complete picture. The quality of the topology, memory subsystem, software stack and workload optimization can matter just as much.
For now, Vera Rubin’s specifications point to a more conservative view of NVLink performance than Nvidia’s earlier material did. Before committing to large deployments, customers will likely want validated measurements, workload benchmarks and a clear explanation of how the 3.0 TB/s figure was obtained. The central question is no longer simply how fast Rubin’s links are on paper. It is how much of that capacity AI operators can reliably use when an entire rack is working as one system.
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